MOSgated devices are well known and include such devices as power MOSFETS, IGBTs, gate controlled thyristors and the like. In these devices, a source and drain layer are connected by a channel layer. A MOSgate forms a depletion region in the channel layer thereby allowing or preventing movement of carriers through the channel from the source to the drain.
In such devices, the gate and the channel region are either lateral or vertical relative to the plane of the channel. So called trench devices employ a vertical channel. Generally, this requires plural spaced narrow deep trenches into the semiconductor device substrate. A gate oxide lines the walls of the trench and the trench is then filled with a conductive polysilicon gate electrode filler.
Trench type MOSgated devices and have a low gate capacitance which is very useful in many low voltage applications. However, their fabrication is difficult and expensive, particularly due to the need to etch the deep trenches and fill them with a polysilicon gate filler. This process is complicated by the need for plural mask steps which must be aligned with great accuracy.
Therefore, there exists a need in the art for a method of inexpensively manufacturing a MOSgated device which does not require etching deep, narrow trench in silicon.